1. Field of the Invention
The present invention relates generally to an improved apparatus and method for attaching devices to a digital serial bus such as an I.sup.2 C type of bus.
2. Description of the Related Art
Various types of digital serial busses have been known. One example of this type of bus is an I.sup.2 C bus. These types of busses allow for low cost serial communication between electronic systems. However, as the speed of such buses are raised, various problems exist. For example, an I.sup.2 C bus is limited in speed to the slowest device "hanging" on the bus. This is not a problem if the devices on the bus only need to send a very limited amount of data and/or this data is sent very infrequently. As the amount of data to be sent on the bus increases or the frequency at which devices are polled or send data increases or when a combination of these two situations occur, the limiting of the bus to the slowest device becomes problematical.
As an example using FIG. 1 as a reference, suppose a single I.sup.2 C master 28 were used to connect to slave devices 40, 42, 44, and 46. If I.sup.2 C slave device 40 could only operate at 10 kHz, the remaining I.sup.2 C slave devices 42, 44 and 46 would be limited to that speed even if these devices might normally operate at 100 kHz. Either wait states would need to be added to the other I.sup.2 C slave devices 42, 44 and 46 or some other method (for example, the master could drive the clock for the bus slower) would be required. This is an unacceptable slow down of the communication system. Further, the capacitive loading of the I.sup.2 C bus becomes an issue as more devices or high capacitive devices (such as monitors) are added. Even if all the I.sup.2 C slaves 40, 42, 44 and 46 normally have the same speed, if one of these devices has a high capacitive load, the speed on that segment would be slower. A further complication, well known to those skilled in the art, is that the termination of the I.sup.2 C bus becomes problematical as well.
One approach that might be tried is shown in FIG. 2 where multiple I.sup.2 C masters 22, 24 and 26 are employed. However, as I.sup.2 C masters are relatively expensive devices, this type of segmentation is expensive. Further, the number of bus connections from the microcontroller (or microprocessor) 10 becomes cumbersome or is limited, which makes device coordination difficult.